1. Technology Field
The present invention generally relates to a data writing method for a rewritable non-volatile memory, and a memory control circuit unit and a memory storage apparatus using the same.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 players in recently years, the consumers' demand to storage media has increased drastically. Because a rewritable non-volatile memory is capable of providing features such as data non-volatility, low power consumption, small volume, and non-mechanical structure, high reading and writing speed, the rewritable non-volatile memory has become the most adaptable memory applied in a portable electronic product, e.g., a notebook computer. A solid state drive (SSD) is a storage apparatus which utilizes a flash memory as its storage medium. Therefore, the flash memory industry has become a very popular part of the electronic industry in recent years.
In an NAND flash memory module, a physical programming unit is composed of a plurality of memory cells arranged on the same word line. According to the number of bits which can be stored by each memory cell, NAND flash memory modules can be classified into a single level cell (SLC) NAND flash memory module, a multi level cell (MLC) NAND flash memory module and a trinary level cell (TLC) NAND flash memory module. Each memory cell in the SLC NAND flash memory module can store data of 1 bit (i.e., “1” or “0”), each memory cell in the MLC NAND flash memory module can store data of 2 bits, and each memory cell in the TLC NAND flash memory module can store data of 3 bits.
Since each memory cell in the SLC NAND flash memory can store data of 1 bit, in the SLC NAND flash memory module, the memory cells arranged on the same word line are corresponding to a physical programming unit.
In comparison with the SLC NAND flash memory module, a floating gate storage layer in each memory cell of the MLC NAND flash memory module can store data of 2 bits, and each storage state (i.e., “11,” “10,” “01,” or “00”) includes the least significant bit (LSB) and the most significant bit (MSB). For instance, a value of the first bit from the left of the storage states is the LSB, and a value of the second bit from the left of the storage states is the MSB. Accordingly, the memory cells arranged on the same word line may constitute two physical programming units, wherein the physical programming unit constituted by the LSB of the memory cells is referred to as a lower physical programming unit, and the physical programming unit constituted by the MSB of the memory cells is referred to as an upper physical programming unit. Specifically, when an error occurs during the upper physical programming units being programmed, data stored by the lower physical programming unit may be therefore lost.
Similarly, each memory cell in the TLC NAND flash memory can store data of 3 bits, and each storage state (i.e., “111,” “110,” “101,” “100,” “011,” “010,” “001,” or “000”) includes an LSB which is the first bit from the left of the storage states, a center significant bit (CSB) which is the second bit from the left of the storage states and an MSB which is the third bit from the left of the storage states. Accordingly, the memory cells arranged on the same word line may constitute three physical programming units, wherein the physical programming unit constituted by the LSB of the memory cells is referred to as a lower physical programming unit, the physical programming unit constituted by the CSB of the memory cells is referred to as a center physical programming unit, and the physical programming unit constituted by the MSB of the memory cells is referred to as a upper physical programming unit. Specifically, in the TLC NAND flash memory module, a word line has to be programmed for three times to ensure that the data on the word line can be stably stored. For instance, after memory cells on a first word line are programmed for the first time, the memory cells on the first word line are in a first state. The memory cells on the first word line are programmed again while the memory cells on a second word lines are programmed, and in this circumstance, the memory cells on the first word line are in a foggy state. Then, the memory cells on the first and the second word lines are programmed again while the memory cells on a third word line are programmed, and in this circumstance, the memory cells on the first word line are in a fine state. Further, the memory cells on the second and the third word lines are programmed again while the memory cells on a fourth word line, and in this circumstance, the memory cells on the second word line are in the fine state. Thereby, the data in the memory cells on the first word line can be ensured to be stably stored.
In a case, if a host system issues a suspend command to turn off the host system, the host system subsequently issues a flush command to write buffer data temporarily stored in a buffer memory into a flash memory to prevent the buffer data from being lost after the power is off. Based on the aforementioned hardware limitations to the TLC NAND flash memory module, in order to ensure that the buffer data is stably stored from the buffer memory in the TLC NAND flash memory module, a memory control circuit unit continues to program the other three word lines using dummy data after the buffer data is written from the buffer memory into an operating physical erasing unit of the TLC NAND flash memory module. Thereby, the buffer data from the buffer memory being stably stored into the TLC NAND flash memory module can be ensured. However, the numbers of writing or erasing the flash memory module are limited, and writing invalid data would lead the lifespan of the TLC NAND flash memory module to be shortened.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.